<template>
    <div class="dev-container" v-if="model && model.FrontendConfig.length > 0">
        <n-divider title-placement="left">{{model.TypeName}}</n-divider>
        <template v-for="item in model.FrontendConfig" :key="item.FieldName">
            <DevSettingForm ref="formRef" v-if="item.Type === 'subconfig'" v-model:form-value="model[item.FieldName]" :front-config="item.SubConfigs" />
        </template>
        <DevSettingForm ref="formRef" v-model:form-value="model" :front-config="model.FrontendConfig" />
        <div class="fpgainfo" v-if="isFpga">
            <div class="libinfo" v-if="model.LibPath">
                <span class="label">LibPath: </span><span>{{model.LibPath}}</span>
            </div>
            <div class="libinfo" v-else>
                <span class="errortips">Please compile and synthesize the FPGA module code first.</span>
            </div>
            <n-modal :mask-closable="false" style="width: calc(100vw - 100px); height: calc(100vh - 100px);" v-model:show="showSynthModel" preset="dialog" title="Dialog">
                <template #header>
                <div>Synthesis log</div>
                </template>
                <OutPutLogs/>
            </n-modal>
            <n-button type="primary" @click="Synthesis">Compile & Synthesis</n-button>
        </div>
    </div>
</template>
<script setup lang="ts">
import { ref,computed } from 'vue'
import DevSettingForm from './DevSettingForm.vue';
import { NDivider,NButton,NModal } from 'naive-ui'
import { MakeVerilatorLib } from '../../../wailsjs/go/main/App';
import type { soc,pins,device } from '../../../wailsjs/go/models';
import type { DevSetting } from '@/scripts/types';
import OutPutLogs from './OutPutLogs.vue';


const formRef = ref();
const showSynthModel = ref(false);
const model = defineModel<DevSetting>("devSetting");
const props = defineProps({
    isFpga: {
        type: Boolean,
        default: false
    }
})

const emit = defineEmits(["fpgacompiled"])

const verification = (): Promise<boolean> => {
    if (props.isFpga && (!model.value || !model.value.LibPath)) {
        return Promise.resolve(false);
    }
    if (!formRef.value) {
        return Promise.resolve(true);
    }
    return formRef.value.verification();
}

async function Synthesis() {
    if (model.value) {
        showSynthModel.value = true;
        let res = await MakeVerilatorLib(model.value[model.value.FrontendConfig[0].FieldName]);
        model.value.LibPath = res.LibPath;
        model.value.InputPins = res.InputPins;
        model.value.OutputPins = res.OutputPins;
        emit("fpgacompiled",[...model.value.InputPins,...model.value.OutputPins])
    }
}

defineExpose({
    verification
})

</script>
<style lang="scss" scoped>
.dev-container {
    width: 100%;
    display: flex;
    flex-direction: column;
    align-items: center;
    justify-content: flex-start;
    .fpgainfo {
        width:80%;
        display: flex;
        flex-direction: column;
        align-items: center;
        justify-content: flex-start;
        color: var(--fv-c-text-black);
        .libinfo{
            width:100%;
            display: flex;
            flex-direction: row;
            align-items: center;
            justify-content: flex-start;
            .label {
                width: 180px;
                text-align: right;
            }
            .errortips {
                width: 100%;
                text-align: center;
                color: var(--fv-c-text-red);
                font-size: 12px;
            }
        }
        span {
            padding: 12px;
            display: block;
            width:100%;
        }
    }
}
</style>